ADS124S08 Bibliothek hinzugefügt, erste möglichkeit wie auswertung funktionieren könnte hinzugefügt, sollte aber noch weniger blockierend gemacht werden
This commit is contained in:
raphael stade
@@ -0,0 +1,404 @@
|
||||
/*
|
||||
* ADS124S08_defines.h
|
||||
*
|
||||
* Created on: Nov 10, 2024
|
||||
* Author: zafst
|
||||
*/
|
||||
|
||||
#ifndef INC_ADS124S08_DEFINES_H_
|
||||
#define INC_ADS124S08_DEFINES_H_
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#ifndef __weak
|
||||
#define __weak __attribute__((weak))
|
||||
#endif /* __weak */
|
||||
#endif
|
||||
|
||||
#define UNUSED(X) (void)X
|
||||
|
||||
#define ADS124S08_DATA_MIN_SIZE 3
|
||||
|
||||
#define ADS124S08_RESET_COMMAND 0x06
|
||||
#define ADS124S08_READ_DATA_COMMAND 0x12
|
||||
#define ADS124S08_START_CONVERSION_COMMAND 0x09
|
||||
#define ADS124S08_STOP_CONVERSION_COMMAND 0x0B
|
||||
#define ADS124S08_SFOCAL_COMMAND 0x19
|
||||
#define ADS124S08_SYOCAL_COMMAND 0x16
|
||||
|
||||
typedef enum ADS124S08_State
|
||||
{
|
||||
ADS124S08_OK,
|
||||
ADS124S08_ERROR,
|
||||
}e_ADS124S08_State;
|
||||
|
||||
typedef enum ADS124S08_ChipID
|
||||
{
|
||||
ADS124S08_ID0,
|
||||
ADS124S08_ID1,
|
||||
ADS124S08_ID2,
|
||||
ADS124S08_ID3,
|
||||
ADS124S08_MAX_NUM_CHIPS,
|
||||
}e_ADS124S08_ChipID;
|
||||
|
||||
typedef enum ADS124S08_CS_State
|
||||
{
|
||||
CS_SELECTED,
|
||||
CS_NOT_SELECTED,
|
||||
}e_ADS124S08_CS_State;
|
||||
|
||||
enum ADS124S08_RegisterMap
|
||||
{
|
||||
REG_ADS124S08_DEVICE_ID,
|
||||
REG_ADS124S08_DEVICE_STATUS,
|
||||
REG_ADS124S08_INPUT_MUX,
|
||||
REG_ADS124S08_GAIN_SETTINGS,
|
||||
REG_ADS124S08_DATA_RATE,
|
||||
REG_ADS124S08_REFERENCE_CONTROL,
|
||||
REG_ADS124S08_EXCITATION_CURRENT_1,
|
||||
REG_ADS124S08_EXCITATION_CURRENT_2,
|
||||
REG_ADS124S08_SENSOR_BIASING,
|
||||
REG_ADS124S08_SYSTEM_CONTROL,
|
||||
REG_ADS124S08_OFFSET_CALIBRATION_1,
|
||||
REG_ADS124S08_OFFSET_CALIBRATION_2,
|
||||
REG_ADS124S08_OFFSET_CALIBRATION_3,
|
||||
REG_ADS124S08_GAIN_CALIBRATION_1,
|
||||
REG_ADS124S08_GAIN_CALIBRATION_2,
|
||||
REG_ADS124S08_GAIN_CALIBRATION_3,
|
||||
REG_ADS124S08_GPIO_DATA,
|
||||
REG_ADS124S08_GPIO_CONFIGURATION,
|
||||
|
||||
};
|
||||
|
||||
#define ADS124S08_DEVICE_ID_MASK 0b00000111
|
||||
enum ADS124S08_DEVICE_ID
|
||||
{
|
||||
ADS124S08_DEVICE_ID_S08,
|
||||
ADS124S08_DEVICE_ID_S06,
|
||||
|
||||
};
|
||||
|
||||
enum ADS124S08_DEVICE_STATUS_FLAGS
|
||||
{
|
||||
ADS124S08_FLAG_REF_MON_LVL_0,
|
||||
ADS124S08_FLAG_REF_MON_LVL_1,
|
||||
ADS124S08_FLAG_NEG_PGA_OUT_NEG_RAIL,
|
||||
ADS124S08_FLAG_NEG_PGA_OUT_POS_RAIL,
|
||||
ADS124S08_FLAG_POS_PGA_OUT_NEG_RAIL,
|
||||
ADS124S08_FLAG_POS_PGA_OUT_POS_RAIL,
|
||||
ADS124S08_FLAG_NOT_RDY,
|
||||
ADS124S08_FLAG_POR,
|
||||
};
|
||||
|
||||
#define ADS124S08_NEGATIVE_IN_SEL_CLEAR_MASK 0b11110000
|
||||
#define ADS124S08_NEGATIVE_IN_SEL_BASE_SHIFT 0
|
||||
typedef enum ADS124S08_NEG_IN_SEL
|
||||
{
|
||||
ADS124S08_NEG_IN_AIN_0,
|
||||
ADS124S08_NEG_IN_AIN_1,
|
||||
ADS124S08_NEG_IN_AIN_2,
|
||||
ADS124S08_NEG_IN_AIN_3,
|
||||
ADS124S08_NEG_IN_AIN_4,
|
||||
ADS124S08_NEG_IN_AIN_5,
|
||||
ADS124S08_NEG_IN_AIN_6,
|
||||
ADS124S08_NEG_IN_AIN_7,
|
||||
ADS124S08_NEG_IN_AIN_8,
|
||||
ADS124S08_NEG_IN_AIN_9,
|
||||
ADS124S08_NEG_IN_AIN_10,
|
||||
ADS124S08_NEG_IN_AIN_11,
|
||||
ADS124S08_NEG_IN_AIN_COM,
|
||||
}e_ADS124S08_NEG_IN_SEL;
|
||||
|
||||
#define ADS124S08_POSITIVE_IN_SEL_CLEAR_MASK 0b00001111
|
||||
#define ADS124S08_POSITIVE_IN_SEL_BASE_SHIFT 4
|
||||
typedef enum ADS124S08_POSITIVE_IN_SEL
|
||||
{
|
||||
ADS124S08_POS_IN_AIN_0,
|
||||
ADS124S08_POS_IN_AIN_1,
|
||||
ADS124S08_POS_IN_AIN_2,
|
||||
ADS124S08_POS_IN_AIN_3,
|
||||
ADS124S08_POS_IN_AIN_4,
|
||||
ADS124S08_POS_IN_AIN_5,
|
||||
ADS124S08_POS_IN_AIN_6,
|
||||
ADS124S08_POS_IN_AIN_7,
|
||||
ADS124S08_POS_IN_AIN_8,
|
||||
ADS124S08_POS_IN_AIN_9,
|
||||
ADS124S08_POS_IN_AIN_10,
|
||||
ADS124S08_POS_IN_AIN_11,
|
||||
ADS124S08_POS_IN_AIN_COM,
|
||||
}e_ADS124S08_POS_IN_SEL;
|
||||
|
||||
#define ADS124S08_PGA_GAIN_CLEAR_MASK 0b11111000
|
||||
#define ADS124S08_PGA_GAIN_BASE_SHIFT 0
|
||||
typedef enum ADS124S08_GAIN_SETTING
|
||||
{
|
||||
ADS124S08_GAIN_1,
|
||||
ADS124S08_GAIN_2,
|
||||
ADS124S08_GAIN_4,
|
||||
ADS124S08_GAIN_8,
|
||||
ADS124S08_GAIN_16,
|
||||
ADS124S08_GAIN_32,
|
||||
ADS124S08_GAIN_64,
|
||||
ADS124S08_GAIN_128,
|
||||
}e_ADS124S08_GAIN_SETTING;
|
||||
|
||||
#define ADS124S08_PGA_MODE_CLEAR_MASK 0b11110111
|
||||
#define ADS124S08_PGA_MODE_BASE_SHIFT 3
|
||||
typedef enum ADS124S08_PGA_MODE
|
||||
{
|
||||
ADS124S08_PGA_DISABLED,
|
||||
ADS124S08_PGA_ENABLED,
|
||||
|
||||
}e_ADS124S08_PGA_MODE;
|
||||
|
||||
#define ADS124S08_PROG_CONV_DELAY_CLEAR_MASK 0b00011111
|
||||
#define ADS124S08_PROG_CONV_DELAY_BASE_SHIFT 5
|
||||
typedef enum ADS124S08_PROG_CONV_DELAY
|
||||
{
|
||||
ADS124S08_PROG_CONV_DELAY_14_x_tMOD,
|
||||
ADS124S08_PROG_CONV_DELAY_25_x_tMOD,
|
||||
ADS124S08_PROG_CONV_DELAY_64_x_tMOD,
|
||||
ADS124S08_PROG_CONV_DELAY_256_x_tMOD,
|
||||
ADS124S08_PROG_CONV_DELAY_1024_x_tMOD,
|
||||
ADS124S08_PROG_CONV_DELAY_2048_x_tMOD,
|
||||
ADS124S08_PROG_CONV_DELAY_4096_x_tMOD,
|
||||
ADS124S08_PROG_CONV_DELAY_1_x_tMOD,
|
||||
|
||||
}e_ADS124S08_PROG_CONV_DELAY;
|
||||
|
||||
#define ADS124S08_DATA_RATE_CLEAR_MASK 0b11110000
|
||||
#define ADS124S08_DATA_RATE_BASE_SHIFT 0
|
||||
|
||||
typedef enum ADS124S08_DATA_RATE
|
||||
{
|
||||
ADS124S08_DATA_RATE_2_5SPS,
|
||||
ADS124S08_DATA_RATE_5SPS,
|
||||
ADS124S08_DATA_RATE_10SPS,
|
||||
ADS124S08_DATA_RATE_16_6SPS,
|
||||
ADS124S08_DATA_RATE_20SPS,
|
||||
ADS124S08_DATA_RATE_50SPS,
|
||||
ADS124S08_DATA_RATE_60SPS,
|
||||
ADS124S08_DATA_RATE_100SPS,
|
||||
ADS124S08_DATA_RATE_200SPS,
|
||||
ADS124S08_DATA_RATE_400SPS,
|
||||
ADS124S08_DATA_RATE_800SPS,
|
||||
ADS124S08_DATA_RATE_1000SPS,
|
||||
ADS124S08_DATA_RATE_2000SPS,
|
||||
ADS124S08_DATA_RATE_4000SPS,
|
||||
|
||||
}e_ADS124S08_DATA_RATE;
|
||||
|
||||
#define ADS124S08_SEL_FILTER_CLEAR_MASK 0b11101111
|
||||
#define ADS124S08_SEL_FILTER_MODE_BASE_SHIFT 4
|
||||
typedef enum ADS124S08_FILTER_MODE
|
||||
{
|
||||
ADS124S08_FILTER_MODE_SINC3,
|
||||
ADS124S08_FILTER_MODE_LOW_LATENCY,
|
||||
|
||||
}ADS124S08_FILTER_MODE;
|
||||
|
||||
#define ADS124S08_CONV_MODE_CLEAR_MASK 0b11011111
|
||||
#define ADS124S08_CONV_MODE_BASE_SHIFT 5
|
||||
typedef enum ADS124S08_CONV_MODE
|
||||
{
|
||||
ADS124S08_CONV_MODE_CONTINOUS,
|
||||
ADS124S08_CONV_MODE_SINGLE,
|
||||
|
||||
}e_ADS124S08_CONV_MODE;
|
||||
|
||||
#define ADS124S08_SEL_CLOCK_CLEAR_MASK 0b10111111
|
||||
#define ADS124S08_SEL_CLOCK_BASE_SHIFT 6
|
||||
|
||||
typedef enum ADS124S08_CLOCK_MODE
|
||||
{
|
||||
ADS124S08_CLOCK_MODE_INTERNAL,
|
||||
ADS124S08_CLOCK_MODE_EXTERNAL,
|
||||
|
||||
}e_ADS124S08_CLOCK_MODE;
|
||||
|
||||
#define ADS124S08_GLOBAL_CHOP_MODE_CLEAR_MASK 0b01111111
|
||||
#define ADS124S08_GLOBAL_CHOP_MODE_BASE_SHIFT 7
|
||||
typedef enum ADS124S08_GLOBAL_CHOP_MODE
|
||||
{
|
||||
ADS124S08_GLOBAL_CHOP_MODE_DISABLED,
|
||||
ADS124S08_GLOBAL_CHOP_MODE_ENABLED,
|
||||
|
||||
}e_ADS124S08_GLOBAL_CHOP_MODE;
|
||||
|
||||
#define ADS124S08_INTERNAL_REFERENCE_CONF_CLEAR_MASK 0b11111100
|
||||
#define ADS124S08_INTERNAL_REFERENCE_CONF_BASE_SHIFT 0
|
||||
typedef enum ADS124S08_INTERNAL_REFERENCE_CONFIGURATION
|
||||
{
|
||||
ADS124S08_INTERNAL_REFERENCE_OFF,
|
||||
ADS124S08_INTERNAL_REFERENCE_ON_OFF_IN_POWERDOWN,
|
||||
ADS124S08_INTERNAL_REFERENCE_ALWAYS_ON,
|
||||
|
||||
}e_ADS124S08_INTERNAL_REFERENCE_CONFIGURATION;
|
||||
|
||||
#define ADS124S08_REFERENCE_IN_SEL_CLEAR_MASK 0b11110011
|
||||
#define ADS124S08_REFERENCE_IN_SEL_BASE_SHIFT 2
|
||||
|
||||
typedef enum ADS124S08_REFERENCE_IN_SEL
|
||||
{
|
||||
ADS124S08_REFERENCE_IN_REFP0_REFN0,
|
||||
ADS124S08_REFERENCE_IN_REFP1_REFN1,
|
||||
ADS124S08_REFERENCE_IN_INTERNAL_2_5,
|
||||
|
||||
}e_ADS124S08_REFERENCE_IN_SEL;
|
||||
|
||||
#define ADS124S08_REFN_BUFFER_BYPASS_CLEAR_MASK 0b11101111
|
||||
#define ADS124S08_REFN_BUFFER_BYPASS_BASE_SHIFT 4
|
||||
typedef enum ADS124S08_REFN_BUFFER_MODE
|
||||
{
|
||||
ADS124S08_REFN_BUFFER_BYPASSED,
|
||||
ADS124S08_REFN_BUFFER_NOT_BYPASSED,
|
||||
|
||||
}e_ADS124S08_REFN_BUFFER_MODE;
|
||||
|
||||
#define ADS124S08_REFP_BUFFER_BYPASS_CLEAR_MASK 0b11011111
|
||||
#define ADS124S08_REFP_BUFFER_BYPASS_BASE_SHIFT 5
|
||||
typedef enum ADS124S08_REFP_BUFFER_MODE
|
||||
{
|
||||
ADS124S08_REFP_BUFFER_BYPASSED,
|
||||
ADS124S08_REFP_BUFFER_NOT_BYPASSED,
|
||||
|
||||
}e_ADS124S08_REFP_BUFFER_MODE;
|
||||
|
||||
#define ADS124S08_REFERENCE_MON_MODE_CLEAR_MASK 0b00111111
|
||||
#define ADS124S08_REFERENCE_MON_MODE_BASE_SHIFT 6
|
||||
|
||||
typedef enum ADS124S08_REFERENCE_MONITOR_MODE
|
||||
{
|
||||
ADS124S08_REFERENCE_MONITOR_DISABLED,
|
||||
ADS124S08_REFERENCE_MONITOR_L0_ENABLED,
|
||||
ADS124S08_REFERENCE_MONITOR_L0_L1_ENABLED,
|
||||
|
||||
}e_ADS124S08_REFERENCE_MONITOR_MODE;
|
||||
|
||||
#define ADS124S08_SET_EXCITATION_CURRENT_CLEAR_MASK 0b11110000
|
||||
#define ADS124S08_SET_EXCITATION_CURRENT_BASE_SHIFT 0
|
||||
|
||||
typedef enum ADS124S08_EXCITATION_CURRENT
|
||||
{
|
||||
ADS124S08_EXCITATION_CURRENT_OFF,
|
||||
ADS124S08_EXCITATION_CURRENT_10_µA,
|
||||
ADS124S08_EXCITATION_CURRENT_50_µA,
|
||||
ADS124S08_EXCITATION_CURRENT_100_µA,
|
||||
ADS124S08_EXCITATION_CURRENT_250_µA,
|
||||
ADS124S08_EXCITATION_CURRENT_500_µA,
|
||||
ADS124S08_EXCITATION_CURRENT_750_µA,
|
||||
ADS124S08_EXCITATION_CURRENT_1000_µA,
|
||||
ADS124S08_EXCITATION_CURRENT_1500_µA,
|
||||
ADS124S08_EXCITATION_CURRENT_2000_µA,
|
||||
|
||||
}e_ADS124S08_EXCITATION_CURRENT;
|
||||
|
||||
#define ADS124S08_IDAC_1_OUTPUT_CLEAR_MASK 0b11110000
|
||||
#define ADS124S08_IDAC_1_OUTPUT_BASE_SHIFT 0
|
||||
#define ADS124S08_IDAC_2_OUTPUT_CLEAR_MASK 0b00001111
|
||||
#define ADS124S08_IDAC_2_OUTPUT_BASE_SHIFT 4
|
||||
|
||||
typedef enum ADS124S08_IDAC_CHANNEL
|
||||
{
|
||||
ADS124S08_IDAC_CHANNEL_1,
|
||||
ADS124S08_IDAC_CHANNEL_2
|
||||
}e_ADS124S08_IDAC_CHANNEL;
|
||||
|
||||
typedef enum ADS124S08_IDAC_OUTPUT
|
||||
{
|
||||
ADS124S08_IDAC_OUTPUT_AIN_0,
|
||||
ADS124S08_IDAC_OUTPUT_AIN_1,
|
||||
ADS124S08_IDAC_OUTPUT_AIN_2,
|
||||
ADS124S08_IDAC_OUTPUT_AIN_3,
|
||||
ADS124S08_IDAC_OUTPUT_AIN_4,
|
||||
ADS124S08_IDAC_OUTPUT_AIN_5,
|
||||
ADS124S08_IDAC_OUTPUT_AIN_6,
|
||||
ADS124S08_IDAC_OUTPUT_AIN_7,
|
||||
ADS124S08_IDAC_OUTPUT_AIN_8,
|
||||
ADS124S08_IDAC_OUTPUT_AIN_9,
|
||||
ADS124S08_IDAC_OUTPUT_AIN_10,
|
||||
ADS124S08_IDAC_OUTPUT_AIN_11,
|
||||
ADS124S08_IDAC_OUTPUT_AINCOM,
|
||||
ADS124S08_IDAC_OUTPUT_DISCONNECTED,
|
||||
|
||||
}e_ADS124S08_IDAC_OUTPUT;
|
||||
|
||||
#define ADS124S08_VBIAS_LEVEL_CLEAR_MASK 0b10000000
|
||||
#define ADS124S08_VBIAS_LEVEL_BASE_SHIFT 7
|
||||
|
||||
typedef enum ADS124S08_VBIAS_LEVEL
|
||||
{
|
||||
ADS124S08_VBIAS_LEVEL_AVDD_AVSS_2,
|
||||
ADS124S08_VBIAS_LEVEL_AVDD_AVSS_12,
|
||||
|
||||
}e_ADS124S08_VBIAS_LEVEL;
|
||||
|
||||
typedef enum ADS124S08_VBIAS_ENABLE_ON_CHANNEL
|
||||
{
|
||||
ADS124S08_ENABLED_ON_CHANNEL,
|
||||
ADS124S08_DISABLED_ON_CHANNEL,
|
||||
|
||||
}e_ADS124S08_VBIAS_ENABLE_ON_CHANNEL;
|
||||
|
||||
typedef enum ADS124S08_VBIAS_CHANNEL
|
||||
{
|
||||
ADS124S08_VBIAS_CHANNEL_AIN_0,
|
||||
ADS124S08_VBIAS_CHANNEL_AIN_1,
|
||||
ADS124S08_VBIAS_CHANNEL_AIN_2,
|
||||
ADS124S08_VBIAS_CHANNEL_AIN_3,
|
||||
ADS124S08_VBIAS_CHANNEL_AIN_4,
|
||||
ADS124S08_VBIAS_CHANNEL_AIN_5,
|
||||
ADS124S08_VBIAS_CHANNEL_AINCOM,
|
||||
|
||||
}e_ADS124S08_VBIAS_CHANNEL;
|
||||
|
||||
#define ADS124S08_ENABLE_SEND_STAT_CLEAR_MASK 0b11111110
|
||||
#define ADS124S08_ENABLE_SEND_STAT_BASE_SHIFT 0
|
||||
|
||||
typedef enum ADS124S08_SEND_STAT
|
||||
{
|
||||
ADS124S08_SEND_STAT_DISABLED,
|
||||
ADS124S08_SEND_STAT_ENABLED,
|
||||
|
||||
}e_ADS124S08_SEND_STAT;
|
||||
|
||||
#define ADS124S08_ENABLE_CRC_CLEAR_MASK 0b11111101
|
||||
#define ADS124S08_ENABLE_CRC_BASE_SHIFT 1
|
||||
|
||||
typedef enum ADS124S08_SEND_CRC
|
||||
{
|
||||
ADS124S08_SEND_CRC_DISABLED,
|
||||
ADS124S08_SEND_CRC_ENABLED,
|
||||
|
||||
}e_ADS124S08_SEND_CRC;
|
||||
|
||||
#define ADS124S08_SPI_TIMEOUT_ENABLE_CLEAR_MASK 0b11111011
|
||||
#define ADS124S08_SPI_TIMEOUT_ENABLE_BASE_SHIFT 2
|
||||
|
||||
typedef enum ADS124S08_ENABLED_SPI_TIMEOUT
|
||||
{
|
||||
ADS124S08_SPI_TIMEOUT_DISABLED,
|
||||
ADS124S08_SPI_TIMEOUT_ENABLED,
|
||||
|
||||
}e_ADS124S08_ENABLE_SPI_TIMEOUT;
|
||||
|
||||
#define ADS124S08_CAL_SAMPLES_CLEAR_MASK 0b00011000
|
||||
#define ADS124S08_CAL_SAMPLES_BASE_SHIFT 3
|
||||
|
||||
typedef enum ADS124S08_CAL_SAMPLES
|
||||
{
|
||||
ADS124S08_CAL_SAMPLES_1,
|
||||
ADS124S08_CAL_SAMPLES_4,
|
||||
ADS124S08_CAL_SAMPLES_8,
|
||||
ADS124S08_CAL_SAMPLES_16,
|
||||
|
||||
}e_ADS124S08_CAL_SAMPLES;
|
||||
|
||||
/*SYS_MON tbd*/
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* INC_ADS124S08_DEFINES_H_ */
|
||||
@@ -0,0 +1,42 @@
|
||||
/*
|
||||
* ADS124S08_LIB.h
|
||||
*
|
||||
* Created on: Nov 10, 2024
|
||||
* Author: zafst
|
||||
*/
|
||||
|
||||
#ifndef INC_ADS124S08_LIB_H_
|
||||
#define INC_ADS124S08_LIB_H_
|
||||
|
||||
#include "ADS124S08_Defines.h"
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
e_ADS124S08_State ADS124S08_INIT(e_ADS124S08_ChipID ChipID);
|
||||
e_ADS124S08_State ADS124S08_RESET(e_ADS124S08_ChipID ChipID);
|
||||
e_ADS124S08_State ADS124S08_START_CONVERSION(e_ADS124S08_ChipID ChipID);
|
||||
e_ADS124S08_State ADS124S08_STOP_CONVERSION(e_ADS124S08_ChipID ChipID);
|
||||
e_ADS124S08_State ADS124S08_PERFORM_SFOCAL(e_ADS124S08_ChipID ChipID);
|
||||
e_ADS124S08_State ADS124S08_PERFORM_SYOCAL(e_ADS124S08_ChipID ChipID);
|
||||
|
||||
e_ADS124S08_State ADS124S08_SET_POSITIVE_ANALOG_INPUT_CHANNEL(e_ADS124S08_ChipID ChipID,e_ADS124S08_POS_IN_SEL POS_IN);
|
||||
e_ADS124S08_State ADS124S08_SET_NEGATIVE_ANALOG_INPUT_CHANNEL(e_ADS124S08_ChipID ChipID,e_ADS124S08_NEG_IN_SEL NEG_IN);
|
||||
e_ADS124S08_State ADS124S08_SET_PGA_SETTINGS(e_ADS124S08_ChipID ChipID,e_ADS124S08_PROG_CONV_DELAY Delay,e_ADS124S08_PGA_MODE Mode,e_ADS124S08_GAIN_SETTING Gain);
|
||||
e_ADS124S08_State ADS124S08_SET_DATA_RATE(e_ADS124S08_ChipID ChipID,e_ADS124S08_DATA_RATE DataRate);
|
||||
e_ADS124S08_State ADS124S08_SET_FILTER_MODE(e_ADS124S08_ChipID ChipID,ADS124S08_FILTER_MODE Mode);
|
||||
e_ADS124S08_State ADS124S08_SET_CONV_MODE(e_ADS124S08_ChipID ChipID,e_ADS124S08_CONV_MODE Mode);
|
||||
e_ADS124S08_State ADS124S08_SET_CLOCK_MODE(e_ADS124S08_ChipID ChipID,e_ADS124S08_CLOCK_MODE Mode);
|
||||
e_ADS124S08_State ADS124S08_SET_CHOP_MODE(e_ADS124S08_ChipID ChipID,e_ADS124S08_GLOBAL_CHOP_MODE Mode);
|
||||
e_ADS124S08_State ADS124S08_SET_REFERENCE_SETTINGS(e_ADS124S08_ChipID ChipID,e_ADS124S08_INTERNAL_REFERENCE_CONFIGURATION Int_Ref_Conv,e_ADS124S08_REFERENCE_IN_SEL Ref_In_Sel,e_ADS124S08_REFN_BUFFER_MODE Ref_N_Buf_Mode,e_ADS124S08_REFP_BUFFER_MODE Ref_P_Buf_Mode,e_ADS124S08_REFERENCE_MONITOR_MODE Ref_Mon_Mode);
|
||||
e_ADS124S08_State ADS124S08_SET_EXCITATION_CURRENT(e_ADS124S08_ChipID ChipID, e_ADS124S08_EXCITATION_CURRENT Current);
|
||||
e_ADS124S08_State ADS124S08_SET_IDAC_OUTPUT(e_ADS124S08_ChipID ChipID,e_ADS124S08_IDAC_CHANNEL Channel, e_ADS124S08_IDAC_OUTPUT Output);
|
||||
e_ADS124S08_State ADS124S08_SYSTEM_CONTROL(e_ADS124S08_ChipID ChipID,e_ADS124S08_SEND_STAT SendStat,e_ADS124S08_SEND_CRC SendCRC, e_ADS124S08_ENABLE_SPI_TIMEOUT SpiTimeout,e_ADS124S08_CAL_SAMPLES CalSamples);
|
||||
|
||||
e_ADS124S08_State ADS124S08_DRDY_CALLBACK(e_ADS124S08_ChipID ChipID);
|
||||
|
||||
e_ADS124S08_State ADS124S08_DATA_READY_INTERRUPT(e_ADS124S08_ChipID ChipID); //extern aufrufen wenn Interrupt kommt
|
||||
|
||||
e_ADS124S08_State ADS124S08_DATA_READ_CALLBACK(e_ADS124S08_ChipID ChipID,int32_t Data,uint8_t Status);
|
||||
|
||||
|
||||
#endif /* INC_ADS124S08_LIB_H_ */
|
||||
@@ -0,0 +1,20 @@
|
||||
/*
|
||||
* ADS124S08_port.h
|
||||
*
|
||||
* Created on: Nov 10, 2024
|
||||
* Author: zafst
|
||||
*/
|
||||
|
||||
#ifndef INC_ADS124S08_PORT_H_
|
||||
#define INC_ADS124S08_PORT_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "ADS124S08_Defines.h"
|
||||
|
||||
e_ADS124S08_State ADS124S08_PORT_Read_Register(e_ADS124S08_ChipID ChipID, uint8_t* CommandData,uint8_t NumRegs,uint8_t* Data);
|
||||
e_ADS124S08_State ADS124S08_PORT_Read_Data(e_ADS124S08_ChipID ChipID, uint8_t Command, uint8_t* Data, uint8_t size);
|
||||
e_ADS124S08_State ADS124S08_PORT_Write_Register(e_ADS124S08_ChipID ChipID, uint8_t *CommandData, uint8_t NumRegs,uint8_t* Data);
|
||||
e_ADS124S08_State ADS124S08_PORT_CHECK_CRC(uint8_t* Data,uint8_t size,uint8_t CRC_DATA);
|
||||
e_ADS124S08_State ADS124S08_PORT_SEND_COMMAND(e_ADS124S08_ChipID ChipID, uint8_t Command);
|
||||
|
||||
#endif /* INC_ADS124S08_PORT_H_ */
|
||||
Reference in New Issue
Block a user